1) RFIC Design 2-10 Years Product Company
2) RFIC , mmWave 5G 7-14 Years Product Company
3) RF Layout Design 5-12 Years Product Company
4) CPU/ARM Verificat 4-10 Years Product Company
5) ASIC IP Design 6-11 Years Product Company
6) Asic/Soc Verification 5-8 Years Service Company
7) DFT 5-9 Years Service Company
8) STA, SOC Block Level 5-8 Years Service Company
With GOOD CTC + LOTS OF STOCKS
Please Share your Updated CV to krishna.m@cambio.co.in
Hiring | Walk-in Interview | Freshers | Jobs Alert | Campus Drive | Career Consultant
Chennai Jobs
Showing posts with label STA. Show all posts
Showing posts with label STA. Show all posts
Thursday, 9 April 2020
Monday, 30 March 2020
We have Openings on Below Requirements with Good Product , Services & Startup companies as Well.
Location:: Bangalore
1) Firmware with BIOS,UEFI development 3-5 Years- Services
2) Firmware with RTOS Developer ,CPU -- 7-14 Years Product
3) Firmware with RTOS Developer ------ 10-15 Years Product
4) CPU Verification, Arm Processor ----- 4-10 Years Startup Product
5) CPU Verification, X86, UVM 5-9 Years Service
6) RFIC and mmWave CMOS IC Design 7-14 Years Product
7) RTL ASIC Design (Only Product) 2-10 Years Product
8) STA-Synthesis (Only Product) 2-8 Years Product
9) Post SI Performance & HW Validation 10-18 Years Product
With GOOD CTC
Please Share your Updated CV to shiva@cambio.co.in
Note:: Please refer your Friends Or Colleagues who are Looking for a Change
Friday, 27 March 2020
We have Openings in Bangalore & Chennai Locations with Good Product Company for Below Requirements,
BANGALORE LOCATION::
Director: Design implementation (front-end), preferably Multimedia ( Able to handle 30-100 team members )
1. Post SI Performance and HW Validation Lead for Automotive Systems -- 10+ Years
2. Performance/Thermal Engineer for Automotive Systems --- 5+ Yeras
3. DDR and Memory Performance validation engineer --- 5+ Years
4. Design RTL-SOC-IP --- 2– 10 yrs
5. STA-Synthesis Engineer --- 2– 10 yrs
CHENNAI LOCATION::
1.ASIC/SOC Staff Engineer --- 8+ Years
2.Lead Engineer Sr - SoC design ---- 6+ Years
3.Emulation -Senior Lead Engineer ----- 6+ Years
GOOD CTC + LOTS OF STOCKS
Please Share Your Updated CV to krishna.m@cambio.co.in
Thursday, 26 March 2020
Tuesday, 24 March 2020
Greetings from Mirafra!!!
Regards Roopa M
Friday, 9 February 2018
Incise Invites !!
Leading US based MNC looking for below Talents.
DFT : Scan Intersection, ATPG, BIST
Exp : 3 Yrs
Location : Bangalore / Chennai
RTL Design : (STA)
Exp : 4+ Yrs
Location : Bangalore / Chennai
If you are interested please do share your profile on hashim@technovest.in
Thursday, 8 February 2018
We have urgent openings for below requirements in Bangalore location:
1) Verification Engineers-->3+Years
2) Physical Design-->2+years
3) STA Engineers-->2+years
4) DFT Engineers-->2+years
Interested candidates please forward resumes to dinesh.c@sevitechsystems.com
Labels:
Bangalore,
DFT,
PD,
STA,
Verification Engineer
Saturday, 3 February 2018
Entry level Designer Openings at Open-Silicon in PD, STA or DFT depts -For M.Tech 2018 pass-outs
SSC 70%
HSC 65%
Btech ,Mtech 7.5 CGPA
Forward Ur resume at anil.tiwari@open-silicon.com
Thursday, 25 January 2018
Thursday, 11 January 2018
Friday, 5 January 2018
Hurry up!!!
We are
having openings on below requirements!!!
1)RTL Design (2-12 yrs)
2)DFT (2-12 yrs)
3)STA Synthesis (2-10 yrs)
4)Verification (2-12 yrs)
5)Physical Design
(2-12 yrs)
6) Analog Layout (2-12 yrs)
Interested may drop resumes to
princekumar@mirafra.com
or can call 9206268748
Tuesday, 2 January 2018
Urgent Job Openings for the Following skills
PD / DFT / STA : 2+ years @ Bangalore / Noida
DV Engineer : 2+ years @ Noida
IP/SOC VERIFICATION :: 1-6 YEARS:: NOIDA
IP/SOC VERIFICATION :: 3+ YEARS :: BANGALORE
Verification Engineers :3 + years : Pune
Please reply to varada.srinivas@cambio.co.in
DV Engineer : 2+ years @ Noida
IP/SOC VERIFICATION :: 1-6 YEARS:: NOIDA
IP/SOC VERIFICATION :: 3+ YEARS :: BANGALORE
Verification Engineers :3 + years : Pune
Please reply to varada.srinivas@cambio.co.in
Labels:
3-5 years,
Bangalore,
DFT,
DV Engineer,
Noida,
PD Engineer,
SOC Verification,
STA
Thursday, 28 December 2017
Wonderful opportunity to work with SevitechSystems @ Bangalore
----------------- --------------
PhysicalDesign(2+ Years)
DesignVerification(2+ Years)
RTLDesign(ASIC/SOC) (3+ Years)
STA(2+ Years)
PVLead(5+ Years)
resume to srinivas.peyyala@sevitechsystems.com or call on 8147675013
Tuesday, 26 December 2017
Wednesday, 20 December 2017
### Global Level _Core Semiconductor Ppportunities # Product/Service ###
1.RTL : Mid - Very Senior Level : Memory/Serdes/Phy/DMA/DSP :Blr/Hyd.
2.Verification : Mid - Senior Level : Memory/CPU/GPU/FPGA : Blr/Hyd/Noida/Ahmedabad/Sweden.
3.Logic Synthesis : Automotive/Memory chip : Blr/Hyd.
4.STA : Senior - Lead Level : Automotive/Memory chip : Blr/Hyd/Malaysia.
5.DFT : Senior Level : Memory/Serdes Chip : Hyd.
6.PD : Mid - Director Level : Automotive/Memory chip : Blr/Hyd/Noida/Malaysia.
7.Circuit/Memory- Design/Layout : Mid- Lead Level : Memory chip : Blr/Hyd/Noida.
8.CAD/PDK/Flow Design/IPQA : Mid - Lead Level : Memory chip : Blr/Hyd.
9.PSV/Test/Validation/ATE : Mid- Lead Level : Functional/Characterization/Subsystem/Automotive chip/Memory chip/PCIE/Serdes/Microcontroller : Blr/Hyd.
10.IoT/Embedded : Jnr- Director Level :MAC/FPGA/RF/Audio DSP/Hw/Sw/Board Level/PCB : Blr/Hyd.
More information reach to gopinath@bharatheadhunters.com. Cell:9945324381.
Labels:
Ahmedabad,
Bangalore,
DFT,
Hyderabad,
Logic Synthesis,
Malaysia,
Memory Layout,
Noida,
RTL,
STA,
Verification
Thursday, 14 December 2017
Greetings from Mirafra Technologies!!!
Hi All,
We are hiring for the following openings for Mirafra Technologies Bangalore / Hyd
If interested please share your updated resumes at balbirk@mirafra.com
DFT Engineers- 2 to 8 years.
STA Engineers- 2 to 8yrs.
Physical Design – 2 to 10yrs.
EM and IR drop,Power Sign-off – 2 to 8yrs.
PV Engineers - 2 to 8 years
RTL Design with Spyglass and Lint, CDC- 2 to 10yrs.
LEC,Synthesis, CLP – 2 to 8yrs.
Labels:
0-10 Years,
Bangalore,
CLP,
DFT,
EM,
Hyderabad,
Physical Design,
PV Engineers,
RTL Design,
STA
Monday, 11 December 2017
Digicom hiring design engineer following positions
Currently Hiring good engineers with below skill sets
- Physical Design expertise 4-10 yrs For Bangalore location.
- STA expertise 2+ Yrs
-Front End Verification expertise -2-10 Yrs
- Layout expertise 2-6 yrs for Bangalore/Noida and Hyderabad location
-Layout lead having 8+ yrs experience for Bangalore location.
- Analog Design engineers having experience 2-6 yrs.
Interested, can share updated resume to-supriya@digicomm.org
- Physical Design expertise 4-10 yrs For Bangalore location.
- STA expertise 2+ Yrs
-Front End Verification expertise -2-10 Yrs
- Layout expertise 2-6 yrs for Bangalore/Noida and Hyderabad location
-Layout lead having 8+ yrs experience for Bangalore location.
- Analog Design engineers having experience 2-6 yrs.
Interested, can share updated resume to-supriya@digicomm.org
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