We have Openings on Below Requirements @ Bangalore

1) RFIC Design 2-10 Years Product Company 2) RFIC , mmWave 5G 7-14 Years Product Company 3) RF Layout Design 5-12 Years Product Company 4) CPU/ARM Verificat 4-10 Years Product Company 5) ASIC IP Design 6-11 Years Product Company 6) Asic/Soc Verification 5-8 Years Service Company 7) DFT 5-9 Years Service Company 8) STA, SOC Block Level 5-8 Years Service Company With GOOD CTC + LOTS OF STOCKS Please Share your Updated CV to krishna.m@cambio.co.in

#krisemi is hiring for the following

1) DFT Engineer (ATPG,scan,mbist) Exp: 4+ Years Location: Noida and Bangalore for the client and more info please contact me. 2) Design Verification Exp: 4+ Years Location: Bangalore 3) Physical Design Exp: 5+ Years Location: Bangalore 4) RTL Design Engineer Exp: 6+ Years Location: Bangalore Contact me: hr@krisemi.com

Tessolve Hiring VLSI Engineers for Bangalore , Hyd , Chennai and Noida

Greetings from Cerium Systems!!!

Greetings from Cerium Systems!!! We are hiring below skills: Design Verification - 3.5 yrs to 12 yrs FPGA Design - 3 yrs to 10 yrs DFT - 3 yrs to 12 yrs Location: Bangalore/Vizag/Hyderabad Interested Candidates kindly share your updated profile to: ayesha.pyarejan@cerium-systems.com

#Onsite and #Urgent Requirement at #Krisemi

1) 5G Developer/Layer 2/Layer 3 Exp: 1+ Years Skill: C programming, 5G Location: Bangalore 2) Design Verification Engineer Exp: 4 - 10 Years Location: Hyderabad / Bangalore 3) DFT Engineer (mbist) Exp: 3+ Years Location: Bangalore 4) RTL Design Engineer Exp: 5+ Years Skill: Digital SOC IP design and Digital SOC integration. Location: UK and Europe 5) Analog Layout Engineer Exp: 3 - 8 Years Location: Bangalore Ping me: hr@krisemi.com

Hiring DFT Engineer | Verification Engineer | Bangalore

Currently hiring on below skills for Bangalore location Skill: DFT Experience: 2+ years Skill: Verification Experience: 3+ years Interested can share updated CV at mounika.raavi@insemitech.com Note: References are always welcome Thanks & Regards Mounika.

Greetings from Sanguinix..

Hiring DFT Engineer - Bangalore

We have Openings in Bangalore & Chennai Locations with Good Product Company for Below Requirements,

BANGALORE LOCATION:: Director: Design implementation (front-end), preferably Multimedia ( Able to handle 30-100 team members ) 1. Post SI Performance and HW Validation Lead for Automotive Systems -- 10+ Years 2. Performance/Thermal Engineer for Automotive Systems --- 5+ Yeras 3. DDR and Memory Performance validation engineer --- 5+ Years 4. Design RTL-SOC-IP --- 2– 10 yrs 5. STA-Synthesis Engineer --- 2– 10 yrs CHENNAI LOCATION:: 1.ASIC/SOC Staff Engineer --- 8+ Years 2.Lead Engineer Sr - SoC design ---- 6+ Years 3.Emulation -Senior Lead Engineer ----- 6+ Years GOOD CTC + LOTS OF STOCKS Please Share Your Updated CV to krishna.m@cambio.co.in

Cerium Systems is hiring!!

Design Verification - 3 yrs to 12 yrs
FPGA Design - 3 yrs to 12 yrs
Location: Vizag/ Hyderabad/ Bangalore

Interested ??
please share your details to :
pragathi.chighulapally@cerium-systems.com

Onsite Opportunities Malaysia | Japan | Sweden !!!

1) Physical Design Engineer
Exp: 5 - 8 Years
Location: Malaysia and Japan

2) Design Verification Engineer
Exp: 4 - 8 Years
Location: Sweden
Notice: 2 months

3) RTL Design
Exp: 5 - 8 Years
Location: Europe / Bangalore

4) DFT Engineer
Exp: 5+ Years
Location: Malaysia

Ping me: hr@krisemi.com

SVENTL | Hiring | DFT | STA | PD | Singapore | Bangalore

PerfectVIPs is Hiring for Bangalore, Hyderabad, Pune | DFT | PD | RTL | Verification

PD Engineer : Exp : 4+ Years Verification : Exp : 4+ Years RTL Design: Exp: 5+ Years DFT : 7+ Years (Bangalore Location) DFT : 3+ Years (Hyderabad Location) Interested please drop your resume to : baishali@perfectvips.com

Hiring Semiconductor Talents for Physical design, Design & Verification and DFT(Design for Testability)

Hiring Semiconductor Talents for Physical design, Design & Verification and DFT(Design for Testability) with our leading well established company. Experience: 8+ yrs. Job Location: Bangalore Notice Period: Max 30 days Interested people share resume to sarada.e@sanguinixenergia.com

Mirafra is hiring for below skill sets with 3+ yrs of experience for Bangalore & Hyderabad.

RTL Design Verification FPGA Design/RTL Design FPGA Emulation DFT Physical Design with Innovus If interested please share your profile @ lakshmikrishnappa@mirafra.com

Recruiting DFT Engineers for opportunities in India, Israel, USA

We do have active requirements for the following Skills :

1) Verification Engineer ( DDR) Experience: 2-10 years Openings: 5-8 Location: Bangalore, Noida, Taiwan 2) Analog Validation Engineer Experience: 2 to 10 years Openings: 5-8 Location: Noida 3) Senior DFT Engineer Experience: 2-10 years Openings: 5-8 Location: Noida, Bangalore, Taiwan 4) Sr. Verification Engineer Experience: 8-14 years Openings: 5-8 Location: Noida, Taiwan Skill set : SV/UVM, DDR4 /LPDDR (CNRTL + PHY + 3DS), AXI. please reply with updated CV to ashwini@cambio.co.in Regards,  Ashwini.

Incise Invites !!

We have urgent openings for below requirements in Bangalore location:

1) Verification Engineers-->3+Years   2) Physical Design-->2+years 3) STA Engineers-->2+years  4) DFT Engineers-->2+years  Interested candidates please forward resumes to dinesh.c@sevitechsystems.com

Entry level Designer Openings at Open-Silicon in PD, STA or DFT depts -For M.Tech 2018 pass-outs

SSC 70% HSC 65% Btech ,Mtech 7.5 CGPA Forward Ur resume at anil.tiwari@open-silicon.com