Smartsocs is hiring for below position:

Smartsocs is hiring for below position:

RTL Design with high speed protocol 
RTL Integration & CDC, Lint, Spyglass 
IP Verification with DDR Phy or Serdes 
DFT Enginners

Exp: 4+ years
Location:  Bangalore
Interested, please share resume to susmita.ghosh@smartsocs.com

Mirafra is hiring for below skill sets with 3+ yrs of experience for Bangalore & Hyderabad.

RTL Design Verification FPGA Design/RTL Design FPGA Emulation DFT Physical Design with Innovus If interested please share your profile @ lakshmikrishnappa@mirafra.com

Hiring Trained Freshers For Noida Location.

1. Verification Engineer 2. ML, AI, Python 3. RTL Design Share resume on madhuri.tomar@incise.in

#Digicomm is hiring !!

1) Physical Design- 2-8 years 2) Verification Engineer- 2-8 years 3) Layout Engineer- 2-8 years 4) RTL Design- 2-8 years Interested candidates please mail your resume at ashwani.kumar@digicomm.org Thanks: Ashwani

We are having openings on below requirements!!!

1)RTL Design (2-12 yrs) 2)DFT (2-12 yrs) 3)STA Synthesis (2-10 yrs) 4)Verification (2-12 yrs) 5)Physical Design (2-12 yrs) 6) Analog Layout (2-12 yrs) Interested may drop resumes to anushikakoul@mirafra.com or can call 9111683788.

RTL Engineer openings in US

We have multiple open position for RTL Engineers with 2+ years of experience in US. If any body is holding H1 visa and looking out for a change can share their updated CV at anushikakoul@mirafra.com.

We are having openings on below requirements!!!

 

1)RTL Design          (2-12 yrs)

2)DFT                        (2-12 yrs)

3)STA Synthesis     (2-10 yrs)

4)Verification          (2-12 yrs)

5)Physical Design  (2-12 yrs)

6) Analog Layout    (2-12 yrs)

Interested may drop resumes to anushikakoul@mirafra.com

or can call 9111683788.

Very excited opportunity with leading MNC !!!

Skill: Physical Design ( 5 + year)

Location : Bangalore

Skill : RTL Design ( Asic/SOC/IP) ---4+ year

Location : Noida

Interested pls share their profile at sarishti@techsysglobal.com

detailed JD can be provided on interest.

Hurry up!!!

 We are having openings on below requirements!!!

1)RTL Design          (2-12 yrs)

2)DFT                        (2-12 yrs)

3)STA Synthesis     (2-10 yrs)

4)Verification          (2-12 yrs)

5)Physical Design  (2-12 yrs)

6) Analog Layout    (2-12 yrs)

Interested may drop resumes to princekumar@mirafra.com

or can call 9206268748

We are urgently looking for RTL Design Engineer (Exp: 2 -4 Years) for Chennai location.

•             Strong knowledge of RTL Design in Verilog,

•             Hands on experience in Linting & Synthesis tools - Understanding of Timing concepts

•             Hands on experience in Multi clock design & low power concepts

•             Strong Protocol Knowledge on AXI/AHB Bus and I2C

If you have the required skills, please share your profile to vipin@incise.in 

Hiring for VLSI Engineers

Wonderful opportunity to work with SevitechSystems @ Bangalore

-----------------  --------------
PhysicalDesign(2+ Years)
DesignVerification(2+ Years)
RTLDesign(ASIC/SOC) (3+ Years)
STA(2+ Years)
PVLead(5+ Years)
resume to srinivas.peyyala@sevitechsystems.com or call on 8147675013

Walk in interview for RTL Design | FPGA | Analog Design & Layout | Verification | Physical Design | Opennings @ Bangalore

We are hiring for the following openings for SeviTech Systems- Bangalore

 Greetings from SeviTech Systems!!!

If interested please share your updated resumes at dinesh.c@sevitechsystems.com

Verificaion Engineers- 3 to 10 years.
Physical Design – 2 to 10yrs.
STA Engineers- 2 to 10yrs.
PV Engineers - 1 to 10 years
RTL Design - 2 to 10yrs.
DFT Engineers- 2 to 10 years.

We are hiring for the following openings for Mirafra Technologies Bangalore / Hyd

Greetings from Mirafra Technologies!!! If interested please share your updated resumes at anushikakoul@mirafra.com DFT Engineers- 2 to 8 years. STA Engineers- 2 to 8yrs. Physical Design – 2 to 10yrs. EM and IR drop,Power Sign-off – 2 to 8yrs. PV Engineers - 2 to 8 years RTL Design with Spyglass and Lint, CDC- 2 to 10yrs. LEC,Synthesis, CLP – 2 to 8yrs.

RTL Design/ Physical Design/ Analog design/ DFT Openings in Bangalore | Hyderabad | Noida

We are looking for Verification/ RTL Design/ Physical Design/ Analog design/ DFT  openings then please share your CV in word format at shalini.j@semidigit.com

**Best Salary + Joining Bonus + Medical & Term Insurance assured

Experience Level : 2 - 15 years
Location : Bangalore/Hyderabad/Noida
Notice Period : 0 - 30 days

Best Regards,
Shalini Jaiswal
HR Semidigit

Greetings from Mirafra Technologies!!!

Hi All, 

We are hiring for the following openings for Mirafra Technologies Bangalore / Hyd
If interested please share your updated resumes at balbirk@mirafra.com
DFT Engineers- 2 to 8 years.
STA Engineers- 2 to 8yrs.
Physical Design – 2 to 10yrs.
EM and IR drop,Power Sign-off – 2 to 8yrs.
PV Engineers - 2 to 8 years
RTL Design with Spyglass and Lint, CDC- 2 to 10yrs.
LEC,Synthesis, CLP – 2 to 8yrs.

Mirafra is Hiring RTL Design Engineers!!!

Exp: 2-12 Yrs Interested may drop resumes to santoshbaradi@mirafra.com Location : Bangalore,Hyderabad.

ASIC RTL Design openings in Bangalore | Mindlance Technologies

Excellent Opportunities for Interns and Freshers who have worked on  ASIC RTL DESIGN with EDA tools like: Spyglass, LEC ,Lint or CDC, or has done internship on using these skill sets. Interested can send there resume to sangeetha.m0496@mindlancetech.com                                 or you can call me @ 08067821413.

L&T Technology Services hiring ASIC Verification | RTL Design| Physical Design & DFT | Jobs in Bangalore | Jobs in Pune | 3 to 8 years Exp