Greetings from Tessolve Semiconductor Pvt Ltd.

#Tessolve Semiconductor(A Hero Electronix Venture) is hiring for VLSI Engineers for below requirements.

#Tessolve #Semiconductor Pvt Ltd (A Hero Elecronix #Venture) Is having immediate requirements in VLSI.

#Tessolve #Semiconductor(A Hero Electronix #Venture) is #hiring for #VLSI #Engineers #Bangalore #Hyderabad

We are looking for IP VERIFICATION (#VLSI) ENGINEERS with 2+ years of experience. #Tessolve #Noida #Bangalore #Hyderabad #VLSI

We are looking for IP VERIFICATION (VLSI) ENGINEERS with 2+ years of experience. Location: Noida/Bangalore/Hyderabad JD: Key Technical Skills Self-starter with 2-12 years relevant experience on IP / Sub-system verification on multimillion Gate and complex Design with multiple clocks with minimal supervision Hands on knowledge with strong fundamentals of SV/ UVM (and Verilog) and ability to modify or develop checkers, monitors etc. from scratch. (Must have) Desirable exposure to formal verification, assertions/SVA, functional coverage and regression management. Ability to debug Testbench and RTL issues and handle legacy Testbench and make enhancements. Highly desirable experience in IP with system interface protocols like AMBA /AHB or AXI. Must have experience in end to end IP verification project cycle, including Testbench Strategies, TB development, simulation debugs. Experience desirable on at least one of the following: VCS (Synopsys), Incisive IES/IUS/Xcelium (Cadence) VC Formal (Synopsys), Jasper (Cadence) eManager / vManager (Cadence) or any other Regression Management Tool. Basic understanding of any Version Management and Ticketing tools. Interested can share their CV to heena.mahajan@tessolve.com

#Tessolve #Semiconductors (A Hero electronic #venture) is hiring for multiple openings in VLSI for Noida/Bangalore/Chennai/#Hyderabad | #vlsi #design #RTLdesign #ASIC #SOC #SOCDesign #ipverification

Tessolve Semiconductors (A Hero electronic venture) is hiring for multiple openings in VLSI for Noida/Bangalore/Chennai/Hyderabad. Interested candidates with relevant experience can share CV to heena.mahajan@tessolve.com

Blueberry Urgent Hiring #FPGA #DV #Bangalore

Blueberry Urgent Hiring! - FPGA Lead Engineer - Design Verification Engineer Experience : 4-9 Years Location : Bangalore Immediate joiners preferred. If interested, Kindly share CV to natasha@blueberrysem.com

Greetings from Pozibility Technologies Pvt Ltd | Hiring | PD | DV | DFT

#Hiring #VLSI #Engineers #ASIC #PD #DFT #RTL #FPGA #Bangalore #Soc #Verification

We are hiring for VLSI Engineers/Lead with 3+ years exp @ Bangalore locations!!!! 1. ASIC Verification/IP/SOC level verification 2. Physical Design 3. DFT 4. RTL/FPGA Design We need people who can join in 1 month or immediate!!!!!!! Interested candidates please share your updated profile to umadevi@sonyocareers.com

Greetings From Smartsoc Solutions pvt ltd !!!

We have urgent requirements for below positions:
1. DFT Engineers: 4+ yrs 2. SOC Verification : 4+yrs 3. IP verification: 4+ yrs 4. ASIC RTL Design: 4+ yrs 5:STA synthesis Engineers: 4+ yrs Location: Bangalore & Hyderabad Np: immediate to 30 days interested, please share resume to shobhna.yadav@smartsocs.com

#Tessolve #Semiconductors (A Hero electronic venture) is hiring for multiple openings in #VLSI for #Noida/#Bangalore/#Chennai/#Hyderabad.

We have Openings on Below Requirements #VLSI

We have Openings on Below Requirements, 1) Physical Design 4-8 Years Hyderabad 2) Physical Design 6-8 Years Bangalore 3) Rtl Synthesis with STA, DRC, LVS 4-5 Years Bangalore 4) Embedded firmware 4-8 Years Hyderabad 5) RF Layout Design 5-8 Years Bangalore Please Share Your Updated CV along with CTC Details to sheshu@cambio.co.in

Tessolve Semiconductors (A Hero electronic venture) is hiring for multiple openings in VLSI for Noida/Bangalore/Chennai/Hyderabad.

Tessolve Semiconductors (A Hero electronic venture) is hiring for multiple openings in VLSI for Noida/Bangalore/Chennai/Hyderabad. Interested candidates with relevant experience can share CV to heena.mahajan@tessolve.com

Sivaltech has openings for Senior & Lead positions for the following domains: -IP/ASIC/SOC Design Verification Engineers -ASIC RTL Design Engineers

#VLSI #Bangalore #ASIC #PhysicalDesign #PNR

Looking for Physical Design Engineers with 3+ Years for Bangalore who can join us immediately . SHARE /REFER to priyanka.s@sevitechsystems.com

Hiring Engineers .....................! #RTL #SOC #DFT #Soc #VLSI

Hiring Engineers .....................! Location : Bangalore & Hyderabad Notice : Immediate or less than 30 days RTL Design Engineer SOC Design Engineer SOC Verification Engineer DFT Engineer Interested Can apply with us @ tag@mobiveil.co.in.

Radiant SEMI Hiring #VLSI #Jobs

Hiring #ASIC #Synthesis #RTL #SOC #Embedded #Analog #DFT #PD #Linux

SkandySys is hiring for below positions, interested candidates pls share their resume at rishikumar.singh@skandysys.com 1. ASIC RTL Engineers - 3+ years 2. Physical Design - 4+ years 3. STA/Synthesis - 3+ years 4. DFT - 3+ years 5. ASIC Verification - 4 + years 6. Embedded Linux Drivers: 3+yrs 7. Analog Layout: 4+yrs

SYNAPSE Design | Hiring | VLSI jobs | Design Verification | Bangalore | Hyderabad

VLSI Job Openings

Note: Looking for someone who can join immediately. Location:: Bangalore , Hyderabad & Chennai 1) FPGA Applications Engineer 10-15 Years- Product 2) Graphics System Validation Engineer Lead/Staff-- 6-14 Years Product 3) IP/SOCSystem Validation Lead ------ 6-15 Years Product 4) CPU Verification, Arm Processor ----- 4-10 Years Startup Product 5) CPU Verification, X86, UVM 5-9 Years Service 6) RFIC and mmWave CMOS IC Design 7-14 Years Product 7) RTL ASIC Design (Only Product) 2-10 Years Product 8) STA-Synthesis (Only Product) 2-8 Years Product 9) Post SI Performance & HW Validation 10-18 Years Product With GOOD CTC Please Share your Updated CV to shiva@cambio.co.in