#krisemi is hiring for the following

1) DFT Engineer (ATPG,scan,mbist) Exp: 4+ Years Location: Noida and Bangalore for the client and more info please contact me. 2) Design Verification Exp: 4+ Years Location: Bangalore 3) Physical Design Exp: 5+ Years Location: Bangalore 4) RTL Design Engineer Exp: 6+ Years Location: Bangalore Contact me: hr@krisemi.com

We are #hiring for #Verification_engineer for #Bangalore location.

We are Hiring !

First Pass Semiconductors Pvt Ltd is hiring !!!

Inspiring Possibilities with First Pass Semiconductors Pvt Ltd for experts in Design Verification, Physical Design and Custom Layout with minimum 2 years of experience. Apply now to Fly Abroad with our H1B sponsorship. Promising on Semiconductor best pay, with Challenging work and a fantastic work culture.  

Hiring for below Openings !

1. Physical Design Engineer ( 3+yrs, Bangalore Location )
2. RTL Design Engineer ( 3+yrs, Bangalore Location )
3. Design & Verification ( 3+yrs, Malaysia Location )
4. Verification Engineer ( 2+yrs, Malaysia Location )
5. DFT  Engineer ( 0-5 yrs, Bangalore Location )
6. Analog Layout Design Engineer ( 2+yrs, Bangalore Location )

If anyone is interested share your CV to below mentioned Mail ID :-
jyothi.prakash@isemiedge.com

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Greetings from UST Global !!!

We are hiring - Design Verification Engineer

Wonderful opportunity to work with SevitechSystems @ Bangalore

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PhysicalDesign(2+ Years)
DesignVerification(2+ Years)
RTLDesign(ASIC/SOC) (3+ Years)
STA(2+ Years)
PVLead(5+ Years)
resume to srinivas.peyyala@sevitechsystems.com or call on 8147675013

UST Global is Hiring openings in DFT | Physical Design | Verification | Analog Layout Engineer

Greetings from DC Semiconductor Pvt. Ltd..

We are urgently looking for Design Verification Engineer for our company.
Exp Level: 2-10 Yrs
NP: Immediate to 30 Days

Skills:-
Verilog, SystemVerilog, UVM/OVM

Job Description
o    Working experience with standard protocols such as USB, PCIe, Ethernet, MIPI, AMBA Bus, etc.
o    Must have experience with IP level and SoC level verification with test plan development, test bench coding
o    Must have strong background in logic verification with very good debugging skill
o    Experience in directed test and constrained randomized test development
o    Must have experience in code coverage and functional coverage analysis
o    Expertise in C, Verilog, SystemVerilog, UVM/OVM
o    Gate Level Simulation will be a plus
Interested, please share your updated cv at supriya@digicomm.org

Job opportunities with DC Semiconductor for below-mentioned.

First Pass Semicondctor hiring Design Verification engineers

We are offering positions in Design Verification.... Are you the one having more than 1 year experience in the above skill ???? If yes, Please share your resume on gowtham@firstpass-semi.com