We have Openings on Below Requirements #VLSI

We have Openings on Below Requirements, 1) Physical Design 4-8 Years Hyderabad 2) Physical Design 6-8 Years Bangalore 3) Rtl Synthesis with STA, DRC, LVS 4-5 Years Bangalore 4) Embedded firmware 4-8 Years Hyderabad 5) RF Layout Design 5-8 Years Bangalore Please Share Your Updated CV along with CTC Details to sheshu@cambio.co.in

Hiring Physical Design Engineer #Bangalore #PD

Ambit Semiconductors is hiring for hashtagPhysical_Design Engineers with 4+ years experience. Job Location- Bangalore Interested candidates can share their resumes to career@ambitsemi.com

We have Openings on Below Requirements @ Bangalore

1) RFIC Design 2-10 Years Product Company 2) RFIC , mmWave 5G 7-14 Years Product Company 3) RF Layout Design 5-12 Years Product Company 4) CPU/ARM Verificat 4-10 Years Product Company 5) ASIC IP Design 6-11 Years Product Company 6) Asic/Soc Verification 5-8 Years Service Company 7) DFT 5-9 Years Service Company 8) STA, SOC Block Level 5-8 Years Service Company With GOOD CTC + LOTS OF STOCKS Please Share your Updated CV to krishna.m@cambio.co.in

Tessolve Semiconductors (a venture of Hero Electronix ) Hiring VLSI Engineer for Multiple Location. Intrested folks can reach out me

We are actively Hiring for Physical Design Engineer

We are actively Hiring for Physical Design Engineer Exp : 4-10yrs Location: Hyderabad and Noida Candidates can share your updated resume to sai.shrashti@invecas.com.

Tessolve Hiring VLSI Engineers for Bangalore , Hyd , Chennai and Noida

Greetings from Sanguinix..

We are hiring RTL Design, Verification Engineer, DFT, Physical design, Analog Circuit Design,FPGA Verification and STA Engineers.

We are hiring RTL Design, Verification Engineer, DFT, Physical design, Analog Circuit Design,FPGA Verification and STA Engineers. Experience: 3-15 years Location: Bangalore/Hyderabad/Noida Interested candidates please share your updated resumes to jobs@radiantsemi.com

We have Openings in Bangalore & Chennai Locations with Good Product Company for Below Requirements,

BANGALORE LOCATION:: Director: Design implementation (front-end), preferably Multimedia ( Able to handle 30-100 team members ) 1. Post SI Performance and HW Validation Lead for Automotive Systems -- 10+ Years 2. Performance/Thermal Engineer for Automotive Systems --- 5+ Yeras 3. DDR and Memory Performance validation engineer --- 5+ Years 4. Design RTL-SOC-IP --- 2– 10 yrs 5. STA-Synthesis Engineer --- 2– 10 yrs CHENNAI LOCATION:: 1.ASIC/SOC Staff Engineer --- 8+ Years 2.Lead Engineer Sr - SoC design ---- 6+ Years 3.Emulation -Senior Lead Engineer ----- 6+ Years GOOD CTC + LOTS OF STOCKS Please Share Your Updated CV to krishna.m@cambio.co.in

Onsite Opportunities Malaysia | Japan | Sweden !!!

1) Physical Design Engineer
Exp: 5 - 8 Years
Location: Malaysia and Japan

2) Design Verification Engineer
Exp: 4 - 8 Years
Location: Sweden
Notice: 2 months

3) RTL Design
Exp: 5 - 8 Years
Location: Europe / Bangalore

4) DFT Engineer
Exp: 5+ Years
Location: Malaysia

Ping me: hr@krisemi.com

SVENTL | Hiring | DFT | STA | PD | Singapore | Bangalore

PerfectVIPs is Hiring for Bangalore, Hyderabad, Pune | DFT | PD | RTL | Verification

PD Engineer : Exp : 4+ Years Verification : Exp : 4+ Years RTL Design: Exp: 5+ Years DFT : 7+ Years (Bangalore Location) DFT : 3+ Years (Hyderabad Location) Interested please drop your resume to : baishali@perfectvips.com

We do have active requirements for the following Skills :

1) Verification Engineer ( DDR) Experience: 2-10 years Openings: 5-8 Location: Bangalore, Noida, Taiwan 2) Analog Validation Engineer Experience: 2 to 10 years Openings: 5-8 Location: Noida 3) Senior DFT Engineer Experience: 2-10 years Openings: 5-8 Location: Noida, Bangalore, Taiwan 4) Sr. Verification Engineer Experience: 8-14 years Openings: 5-8 Location: Noida, Taiwan Skill set : SV/UVM, DDR4 /LPDDR (CNRTL + PHY + 3DS), AXI. please reply with updated CV to ashwini@cambio.co.in Regards,  Ashwini.

Incise Invites !!

We have urgent openings for below requirements in Bangalore location:

1) Verification Engineers-->3+Years   2) Physical Design-->2+years 3) STA Engineers-->2+years  4) DFT Engineers-->2+years  Interested candidates please forward resumes to dinesh.c@sevitechsystems.com

Entry level Designer Openings at Open-Silicon in PD, STA or DFT depts -For M.Tech 2018 pass-outs

SSC 70% HSC 65% Btech ,Mtech 7.5 CGPA Forward Ur resume at anil.tiwari@open-silicon.com

We have Open position for "Physical Design" which is based in Bangalore.

Job Details: Position : Physical Design Location : Bangalore Notice period : Immediate/15 Days Experience : 3 - 10 Years Position Type : Permanent Job Description for Physical Design: Independent planning and execution of Netlist-to-GDSII. Full exposure to all aspects of design flows like floor planning, placement, CTS, routing, crosstalk avoidance, physical verification. Should have good exposure to high frequency design convergence and exposure to physical design methodology. 3+ years of experience in IC design Experience in leading block level or chip level Timing closure & Physical Design activities. Work independently in the areas of RTL to GDSII implementation. Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design, etc. Knowledge of low power flow (power gating, multi-VT flow, power supply management etc.). Circuit level comprehension of time critical paths in the design. Tcl/Perl scripting. Regards, Priyanka. Email: priyanka@ananthacybertech.com

Hiring for #Verification #PD #AL

We are hiring for following requirements #Bangalore

Greetings from SeviTech Systems!!!

We are hiring for the following openings for SeviTech Systems-Bangalore Interested may drop your updated resumes to dinesh.c@sevitechsystems.com Physical Design, 2 – 12 yrs. Verification Engineers, 3 – 12 yrs. DFT Engineers, 2 – 12 yrs. STA Engineers, 2 – 12 yrs. Analog layout design, 3 – 10yrs Analog circuit design, 3 –10yrs.