Greetings from Incise Infotech,

Greetings from Incise Infotech, We have an immediate openings for Sr. Lead DFT and Verification Engineers, Experience 8+yrs, Location Bangalore, Interested candidates please share your CV's to nareshbabu@incise.in

Hiring DFT Engineer | Verification Engineer | Bangalore

Currently hiring on below skills for Bangalore location Skill: DFT Experience: 2+ years Skill: Verification Experience: 3+ years Interested can share updated CV at mounika.raavi@insemitech.com Note: References are always welcome Thanks & Regards Mounika.

Greetings from Sanguinix..

T&VS is hiring for Verification Engineers. | Bangalore/Hyderabad/Chennai/Noida |

Interested can share CV to krishnaprasath.s@testandverification.com
JD is given below: Title: Verification Engineer Experience : 3+ years Location: Bangalore/Hyderabad/Chennai/Noida Notice period: Immediate to 45 days JD: Skill set Must Have · Block and Top level verification know-how · Verification Plan Development · System Verilog/OVM or UVM · Testbench Development · VHDL/Verilog simulation and debug · Scripting Nice to have · HVL: Systemverilog/Specman is a plus · End to End RTL Functional Verification Concepts · Understanding of power aware architecture

Yoctozant Technologies is Hiring VLSI Engineer with minimum 1-3 years of relevant experience in below domain for Bangalore:

Memory Circuit Design / Verification Engineer
Good Understanding of memory compiler architectures, Memory Critical Path, Memory Margining Methodology, Sense Amplifier Analysis, Latch Analysis etc. Proficiency with Custom IC Tools viz. Cadence Virtuoso, Spectre / HSPICE / ELDO, Solido etc is required.

The Candidate Must Possess Good Debugging and Interpersonal Skills
Please send profiles to career@yoctozant.com

HCL is Hiring "Verification Engineers" at Noida, Bangalore, Chennai and Hyderabad

HCL is Hiring "Verification Engineers" at Noida, Bangalore, Chennai and Hyderabad for 3+ yrs to 15 yrs of experience range. Please share CV's and referrals at  razaakpasha.s@hcl.com   Job Description: 1)      3+ Yrs. of experience on System Verilog, UVM/OVM based verification. 2)      Experience on SOC/IP/ASIC verification. 3)      Experience on Protocols like USB, Ethernet, HDMI, PCIe, DDR etc. 4)      Experience on latest ARM cores.

We are hiring Formal Verification Senior engineer

For more details kindly write to Shikha.singh@einfochips.com.

We have urgent openings for below requirements in Bangalore location:

1) Verification Engineers-->3+Years   2) Physical Design-->2+years 3) STA Engineers-->2+years  4) DFT Engineers-->2+years  Interested candidates please forward resumes to dinesh.c@sevitechsystems.com

Greetings from SeviTech Systems!!!

We are hiring for the following openings for SeviTech Systems-Bangalore Interested may drop your updated resumes to dinesh.c@sevitechsystems.com Physical Design, 2 – 12 yrs. Verification Engineers, 3 – 12 yrs. DFT Engineers, 2 – 12 yrs. STA Engineers, 2 – 12 yrs. Analog layout design, 3 – 10yrs Analog circuit design, 3 –10yrs.

#Verification Engineer Openings #Bangalore #Hyderabad #Delhi

#Digicomm is hiring !!

1) Physical Design- 2-8 years 2) Verification Engineer- 2-8 years 3) Layout Engineer- 2-8 years 4) RTL Design- 2-8 years Interested candidates please mail your resume at ashwani.kumar@digicomm.org Thanks: Ashwani

Hiring for below Openings !

1. Physical Design Engineer ( 3+yrs, Bangalore Location )
2. RTL Design Engineer ( 3+yrs, Bangalore Location )
3. Design & Verification ( 3+yrs, Malaysia Location )
4. Verification Engineer ( 2+yrs, Malaysia Location )
5. DFT  Engineer ( 0-5 yrs, Bangalore Location )
6. Analog Layout Design Engineer ( 2+yrs, Bangalore Location )

If anyone is interested share your CV to below mentioned Mail ID :-
jyothi.prakash@isemiedge.com

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Greetings from First Pass Semiconductors!!!

Hi Everyone, We are recruiting now for the Domains: PD Engineers / Analog Layout / Verification Engineers. Locations – Hyderabad & Bengaluru. Experience - 2 to 15 years Interested people can share your resume at: murali.jagarlamudi@firstpass-semi.com Contact :+917097049224

We are hiring at Bangalore & Pune !

AMD is hiring for Physical Design & Verification engineer openings @ Hyderabad

Please Share your CV's to kumar.ksk.25@gmail.com

 

 

Hiring verification Engineers @ Bangalore and Hyderabad

Current Openings - Verification Engineer

Cyient is hiring for Physical design ,DFT and AMS (Analog Mixed Signal ) Verification Engineers .

Location : Hyderabad,Pune & Bangalore.

Experience : 2 to 12 Years.

Interested can share their updated CV's to Sudhir.kakinada@cyient.com.

Truechip Solutions is hiring for the following positions

1) Design Engineers with 1+ years of experience for Noida location.
2) DFT Engineers with 2 to 6+ years of experience for Bangalore & Noida location.
3) IP(AXI, DDR, PHY) Engineers with 3 to 8+ years of experience for Bangalore location.
4) SoC Engineers with 3+ years of experience for Bangalore & Noida Location.
5) IP Engineers with 1+ years of experience for Noida location.
6) Verification Engineers with 3 to 7+ years of experience for Pune location.

To know complete JD pls follow the link https://lnkd.in/fB7hAT3

If interested, pls share your CV at seema.kharayat@truechip.in or careers@truechip.net

Greetings from First Pass Semiconductors!!!

We are recruiting now for the Domains:
Physical Design Engineers / Analog Layout / Verification Engineers.
Locations – Hyderabad & Bengaluru.
Experience - 2 to 15 years
Interested people can share your resume at:
murali.jagarlamudi@firstpass-semi.com