Gavstech | Chennai | Dot Net Developers | NOC Engineers | IT Service Desk / Helpdesk

We are hiring at Bangalore & Pune !

ASIC/VLSI Verification & Design engineer openings in Hyderabad and Bangalore

Hi,
Immediate openings for VLSI Verification and Physical Design Engineer with Leading Company.

1. ASIC/VLSI Verification Engineer.
     -->  Strong experience in Testbench for the Block / Cluster, Testcases, Tesplans and 1 year of  experience in OVM/UVM/VMM/Test Harness.
     -->  Knowledge of industry standard protocols like Ethernet, PCIe,   MIPI,  AXI-AHB Bus etc. will be added advantage.

2. ASIC/Physical Design Engineer.
        -->  Should execute block level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. Physical Design Implementation on advanced technology nodes like 28nm, 20nm for block level implementation.  Good understanding on low power concepts. Good understanding on top level physical design, partitioning and timing constraints, IR Drop.

Experience          -->  5-12 Years
Location               -->  Bangalore/Ahmedabad
Notice Period      --> Max 45 Days

Interested candidates please share your profile to sreelekha@asian-technology.com

Digicomm Semiconductor is Looking for Design Verification lead for Bangalore.

Should have 5-12 Years of Experience in System Verilog and UVM.
Experience in Protocols like AXI, AHP, I2C, SPI, DDR , Ethernet .
have worked on SoC level verification or IP level Verification.
Interested Professionals can drop your Profile to shivaranjini@digicomm.org.