Showing posts with label Analog Layout Engineers. Show all posts
Showing posts with label Analog Layout Engineers. Show all posts

Thursday, 2 April 2020

#Onsite and #Urgent Requirement at #Krisemi

1) 5G Developer/Layer 2/Layer 3 Exp: 1+ Years Skill: C programming, 5G Location: Bangalore 2) Design Verification Engineer Exp: 4 - 10 Years Location: Hyderabad / Bangalore 3) DFT Engineer (mbist) Exp: 3+ Years Location: Bangalore 4) RTL Design Engineer Exp: 5+ Years Skill: Digital SOC IP design and Digital SOC integration. Location: UK and Europe 5) Analog Layout Engineer Exp: 3 - 8 Years Location: Bangalore Ping me:

Saturday, 28 March 2020

We are hiring RTL Design, Verification Engineer, DFT, Physical design, Analog Circuit Design,FPGA Verification and STA Engineers.

We are hiring RTL Design, Verification Engineer, DFT, Physical design, Analog Circuit Design,FPGA Verification and STA Engineers. Experience: 3-15 years Location: Bangalore/Hyderabad/Noida Interested candidates please share your updated resumes to

Sunday, 18 November 2018

Analog Layout Engineers

Analog Layout Engineers
Location:-Bangalore
Exp: 2 – 3 yrs.
Immediate Joiner – 15 days Preferable

*Candidate should work independently on block level and chip level Analog layout design or #AMS Layout or Custom Design Layout coordinating with the circuit designer & the layout lead
*Candidate should have 2-3 years of hands-on experience in #Analog or #RF layout.
*Custom layout experience in high frequency circuits such as #LNAs, #Mixers, #VCOs, #DAC, #ADC, #PLL, #LDO etc.
*Full Understanding of IC fabrication and reliability issues
*Full familiarity with #Cadence-#Virtuoso, #PVS, #ASSURA and Calibre tools.

send CV along with below details to: hr@cnsoft.in

Total Exp:
Relevant Exp:
Current Salary:
Expected Salary:
Notice Period (how soon can join?):
Current Location:
Ready to relocate Bangalore:

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