IP QA – Manager
Job Location:
Hyderabad, Noida
Experience : 8-12 years
Education : B.E. /
B.tech / M.E / M
.tech
Key Qualifications
Extensive experience in Analog Design/Layout/quality analysis
Experience with the design or integration of Analog IP Such as PLL, ADC, DAC, Thermal sensor
etc…
Familiarity with both the SOC design flow and Analog design flow
Good understanding of Analog layout verification, digital timing and DFT requirements for SOCs
Experience with Verilog modeling and model validation
Experience with Backend views such as
lef,
milkyway creation and validation for
Ips
Good understanding of RTL-GDSII flow in the verification context
Excellent communication skills and strong debugging skills
Strong initiative and ownership of responsibilities, productive, able to meet aggressive deadlines
Good written and verbal communication skills
Preferred Qualifications:
PDK qualification with various regression suites is a plus
Minimum working knowledge with
industry sign off tools for synthesis and Implementation
Good understanding and knowledge of scripting languages such as
perl and
tcl
Description
You will be part of a small team responsible for Analog IP QA. Your role will be:
Verifying and releasing the deliverable requirements for Analog IP provided by external vendors.
Driving the discussions and coordinating the activities among design, QA and
cad teams to ensure a clean release.
Follow up with the customers and reviewing the design and modelling methodology.
Building up and Running QA suite with various checks on incoming IP deliverables
providing support to the Invecas SOC
frontend and backend design teams for integrating the Analog IP
To Apply Above Job Submit Your Resume to: https://www.invecas.com/jobs/ip-qa-manager/
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