Immediate Opportunity_Memory layout_3yrs #Bangalore

Greetings from SiValley Technologies!!!
1. Drawing layouts for schematics created by Design Engineers in 7nm and other FinFET technologies 2. Experience on Memory Layout. Like RAM, ROM, SDRAM etc. 3. Good knowledge on Memory layout techniques like Area/Speed/Power optimization 4. Good knowledge on different Memory Architecture and Compilers 5. Knowledge on BIT cell, data line & Address line routing concepts 6. Effectively communicate with Design Engineers to clarify and interpret the layout requirements based on the schematics 7. Prepare layout floor-plan and review it with the Design Engineer 8. Create layouts in the Cadence Virtuoso CAD platform as per floor-plan 9. Run DRC, LVS and other verifications required by customer to ensure layout meets foundry requirements  Experience: 3 + years Job Location: Bengaluru. Immediate/15 days preferred. Interested candidates, please share the updated resume:- av@sivalleytech.com