Showing posts with label RTL. Analog Layout. Show all posts
Showing posts with label RTL. Analog Layout. Show all posts

Monday, 8 January 2018

Greetings from SiValley Technologies!!!

We are hiring for below requirements:

1. Physical Design Engineers  - 2 to 9yrs
2. Analog Layout Engineers - 2 to 9yrs
3. RTL Verification Engineers - 3 to 9yrs
4. Std Cell Layout Engineers - 2 to 8yrs
5. Std Cell Characterization - 2 to 8yrs

Interested candidates kindly share resumes to av@sivalleytech.com
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