Immediate Hiring for Synthesis engineer at Wafer Space

Immediate Hiring for Synthesis engineer at Wafer Space 8+ Years of experience in ASIC Synthesis ASIC Synthesis experience - Tool Experiecne - Synopsys DC, Cadence Genus Experience in timing constraints development Should have handled full chip synthesis Experience in Low Power/UPF based designs Good at Synthesis Optimization techniques Good experience with Physical aware synthesis Good experience with pre-layout timing analysis The candidate is expected to own the full chip synthesis activity. Should be able to plan the bottom-up synthesis strategy for complete SoC, which involves multiple power and voltage domains. Anybody interested or has any references can share profile to vikas@waferspace.com.