Wednesday, 25 March 2020

Hiring "Analog Design Engineers" with 4+yrs for "Hyderabad" Location

Interested one please drop your resume at annapurna.b@perfectvips.com
Job Description:
Experience: 4+ years of experience in Analog design
Location: Hyderabad
Key Responsibilities:
·         Architecture of the blocks or signal chain.
·         Design and simulation of the blocks like LNA/Mixers/filters/PLLs/ADC/DAC/power amplifiers
·         Owning the complete analog front-end and delivering this to SoC team.
·         Guide the layout engineer and so the post-layout verification
Preferred Qualifications
·         Proficiency in Cadence Design Environment for Analog, Mixed-Signal designs (Cadence Analog Artist, Cadence Virtuoso, SpectreRF, Assura, NCSim)
·         Prior experience in designing the following in CMOS (0.13u or lower geometries)
o    L-C VCOs, L-C DCOs, DCROs
  LO Dividers, mixers, LO buffers
  Analog PLLs (Charge pump, PFD, Loop-filter, Delta-sigma)
  Digital PLLs (TDC, Digital loop-filter)
  Polar modulators
  Oscillators
  Continuous time and/or discrete time (switched cap) analog blocks (high linearity and low-noise Filters, analog amplifier stages, voltage references, linear regulators, etc.)
  Calibration circuits for compensating process/voltage/temperature variations

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