Hiring bright interns (2018 batch BTech Electronics, MTech VLSI) for Synopsys Bangalore office with =>80% marks.
Skill set required is, good knowledge on FPGA, Verilog, System Verilog and C Programming.
Interested students can share their resumes at vishalka@synopsys.com
Skill set required is, good knowledge on FPGA, Verilog, System Verilog and C Programming.
Interested students can share their resumes at vishalka@synopsys.com
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