Friday, 12 January 2018

We are looking for, Physical Design Engineer find below JD FYR.

. Should have worked on the entire PD Flow from netlist to GDS . (Floor planning, Power Planning, Placement & Optimization, CTS, Routing, . ECO steps, Timing/SI) . Should have very good idea about OCV/MM/MC and multi power designs . (Level shifters, Isolation cells etc) . Should have worked extensively on XTalk/SI/EM . Should be familiar with DSM topics like OPC/CMP etc for 65nm and lower . Technologies . Should be very strong on CTS constraints and skew fixing  Tool specific knowledge: Talus, ICC, SOC, depending on the background . Good understanding of library preparation in any environment (Synopsys, . Magma or Cadence) . Knowledge of DRC/LVS, IR Drop, Formal Verification and Synthesis an . added advantage . Job would require complete ownership from netlist to GDS for blocks. . Should have done similar job well in the past . Should have worked on 65nm and lower technologies. Core Requirements:- • Location: - Bangalore. • Experience: - 2+Years • Salary: - Open For Discussion • Notice Period: immediate/30 Days. If you interested share me your updated resume : akarsh@semicontechs.com

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