Job Code : JR-001550
Experience : 3-12 years
Location : Hyderabad, Bangalore, and Pune
Celebrating its twenty-fifth anniversary in 2016, Cyient is an acknowledged leader in engineering design services, design-led manufacturing, networks and operations, data transformation, and analytics. We collaborate with our clients to help them achieve more and together shape a better future. We call it Designing Tomorrow Together.
Our industry focus includes aerospace, defense, rail transportation, off-highway & industrial, power generation, mining, oil & gas, communications, utilities, geospatial, semiconductor and medical technology. We align closely with the business needs, goals, culture, and core values of our clients. This reflects in the deep, long-standing relationships we have developed and sustained with some of the leading names in these industries.
JOB DESCRIPTION SUMMARY
- Will be working closely with Physical design team understanding new physical design methologies. Performing Place & route, IR drop analysis, Physical Verification Mentor & guide engineers technically
JOB DESCRIPTION
- Experience: 8+ Years
Skills requried:
- Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower technology nodes, also worked on Place & Route, Physical Verification (DRC/LVS/Antenna).
- Should have experience on programming in Tcl/Tk/Perl to automate design process and improve efficiency
- Must have worked on experience with Synopsys/Cadence/Mentor suite (IC Compiler, Primetime, Design Compiler, IC Validator, SOC Encounter, Calibre)
- Strong experience on Static Timing Analysis (PrimeTime), EM/IR-Drop/Cross-talk analysis (PT-SI, Apache), formal or Physical Verification (Formality, Calibre)
- Understanding the practical application of methodologies and Physical Design Tools, Flow Automation and Improvements
- Experience in complex SOC integration, Low Power and High Speed Design and Advanced Physical Verification Techniques.
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