Greetings from Cerium Systems..!!
Immediate hiring for below position.
IP/SOC, PCIE SV,UVM Design Verification, - 3 to 20yrs.
Location : Bangalore / Hyderabad / Chennai and Vizag / Kochi / Ahmedabad
DFT,ATPG SCAN - 3 to 20Yrs
Location - Bangalore / Vizag
Emulation Design, Zebu - 2 to 16 Yrs
Location : Bangalore
Asic RTL design, Lint CDC, Spyglass - 3 to 18Yrs.
Location : Bangalore / Vizag / Hyderabad
FPGA Design - 4 to 16Yrs.
Location - Bangalore/ Hyd / Vizag
Physical Design - 4 to 20 yrs
Location - Bangalore / Kochi
Interested, Can share your updated resume to balbir.kumar@cerium-systems.com / BK00695620@techmahindra.com