Excellent Opportunity for #VLSI Trained #Freshers to work with Design IP R&D Team at #Cadence, #Noida/#Bangalore.

 Excellent Opportunity for #VLSI Trained #Freshers to work with Design IP R&D Team at Cadence, Noida/Bangalore.

Position: IP Design Verification Intern (Multiple Positions)
Experience: 0 Years (Freshers from 2022 or 2023 batch)
Qualification: B.Tech/M.Tech (EE/EC/CS) with CGPA > 7/10
Mandatory Skills: Strong understanding of SV, UVM, C++/OOPS and Digital Design concepts.
Salary: 4.8 - 5.4 LPA

Send your resume to: cdn_dip_hiring@cadence.com with Subject line: "Internship | B.Tech./M.Tech. EE/EC/CS | Year of Passing: 2022/2023 | Preferred Location: Noida/Bangalore"