We are looking for technically strong Digital Verification engineers with excellent debug skills.
Experience Range: 4+ Years.
Job Description :
Will be taking part ownership of existing UVM based testbenches from projects.
Enhancements to the testbench for further project requirements.
Technical Skills :
Proficient in scratch development of UVM based constrained random testbenches.
Well versed in full Verification cycle of testplan, development, debug and coverage closure through industry standard simulation tools.
Should be able to execute the tasks independently.
Knowledge of scripting – perl/python/shell.
If interested, please get in touch with me at nausheen@azventa.com.
Looking forward to hear from you soon..!
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