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Wednesday, 3 October 2018
We are Hiring for Analog Layout Engineer
Technology Area: Analog Layout
Education: B.E. / B.Tech / M.E. / M.Tech /BSE/MSE
Experience: 3-8 Yrs
Interview Location: Bangalore / Hyderabad
Job Location: Bangalore / Hyderabad
Share CV on info@tanyurahr.com
Job Description
• To work independently on Analog layout design of block level and chip level from schematics.
• Hands on experience in Analog Layout design of various designs – SerDes, LVDS, DDR Phy, PLL, Linear and Switching regulators and analog building blocks – amplifiers, comparator, oscillator, voltage and current reference circuits etc.
• Good understanding of deep sub-micron and DFM issues and layout techniques
• Should have work experience in CMOS process technologies – 22nm, 28nm, 45nm, 65nm etc.
• Thorough working knowledge of layout design and physical verification tools - Cadence Virtuoso layout suite, Mentor Calibre, Synopsys Hercules etc.
• Responsible for timely and quality execution of layout design
If Interested kindly share your CV in word document on info@tanyurahr.com
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