Looking for RTL design Engineers with following skill set

Looking for RTL design Engineers with following skill set Exp :5-7yrs Location: Bangalore. Please share your resume on artij@cadence.com Well versed in integration RTL designs having ARM AMBA(AXI4/AHB/ACE) buses. Excellent RTL design skill using Verilog and/or System Verilog Knowledge in one or more of protocols like AMBA/PCIe/CSI/DSI/USB/I2C Familiar with ARM SOC RTL, ARM v8 architecture. Knowledge about Cache Coherency a plus. Experience in using RTL simulator and/or Emulator and/or Prototyping platforms. Working knowledge of at least one scripting language like Perl/Python