"Calling for RTL Engineers / Logic Design Engineers"

• The candidate should have prior experience of working on digital designs including RTL development, timing closure and lab debug of Silicon • Experience in designing memory systems such as DDR/3/4 and LP3/4 or serial links such as PCIE/USB/Ethernet/CEI6 etc Experience - 1-3yrs of experience.  Interested candidates can send their resumes to  indiajobs@rambus.com