Friday, 4 May 2018

HCL Technologies hiring for “Verification Engineers– VLSI Domain” for our engineering R&D Division.

Experience: 4years to 12 years Work Location: Chennai / Bangalore / Noida Required Skill: *Experience on verification environment like SOC/ ASIC / FPGA / IP Verification *Verification experience using: Verilog, System Verilog  *Work experience in methodologies like OVM, UVM *Verification experience at the chip level *Basic Analog and RF interfacing experience is plus *Strong and clear in written and oral communication Interested people kindly share your updated resume to ranjithkumar_e@hcl.com Regards Ranjith

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