Mobiveil is hiring for STA /Synthesis

Strong experience in Logic synthesis, STA, Lint and CDC checks, DFT, constraining, physical implementation Hands-on experience in timing analysis Experience in doing SoC level timing analysis Should be familiar with timing analysis for hierarchical designs Should be proficient with Synopsys' Prime Time for timing analysis Work Location: Bangalore/Chennai Experience Required: 2+ years Interested candidates can share their resumes to p.likhitha@mobiveil.co.in