Greetings from Pozibility Technologies Pvt. Ltd

We have urgent requirement for Design Verification(DV) engineers. JD : * BE/B.Tech/ME/M.TECH or equivalent ECE/EEE * 2.5 to 10 years of experience in SOC/IP Verification * Design and develop test benches using HVLs like Verilog, System Verilog. * Expertise in Verification Methodologies like UVM, OVM. * Should have experience in creating verification environment and test plans * Domain expertise either networking protocols. Or high speed Interface protocols like PCIe, USB, SATA, MIPI, DDR, MAC, Ethernet /SOC verification * Familiarity with scripting languages * Good written and communication skills Please share your CV to kala@pozibility.in Location: Bangalore