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Tuesday, 30 January 2018
We are Hiring Design Verification Engineers with 2+Years of experience.
Skills:-
Verilog, SystemVerilog, UVM/OVM
Job Description:-
Working experience with standard protocols such as USB, PCIe, Ethernet, MIPI, AMBA Bus, etc.
Must have experience with IP level and SoC level verification with test plan development, test bench coding
Must have strong background in logic verification with very good debugging skill
Experience in directed test and constrained randomized test development
Must have experience in code coverage and functional coverage analysis
Expertise in C, Verilog, SystemVerilog, UVM/OVM
Gate Level Simulation will be a plus
Interested, Candidates can please share your updated cv at mroopa@digicomm.org
Labels:
0-2 years,
Verification Engineers
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