Job description
- Chip-level DFT insertion with sound knowledge of scan compression, MBIST & JTAG techniques
- Should have good post silicon DFT bringup and debug experience
- Hands on in multi vendor DFT tools
- Create test plan for complex ASICs and drive the DFT implemetation & verification
- Ability to guide people, multiplex many issues and set priorities
- Good communication and leadership skills
If interested please share your resume at swetha.p@introinnovative.in
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